The present invention relates in general to integrated circuits. More specifically, the invention provides a system and method for power-on reset (POR) and under-voltage lockout (UVLO) schemes. Merely by way of example, the invention is described as it applies to electronic power systems, but it should be recognized that the invention has a broader range of applicability.
Power-on reset (POR) and under-voltage lockout (UVLO) circuits have a wide range of applications. For example, in an electronic system during power on and off transitions, the power supply voltage, typically in order of several to tens of volts, often falls into an invalid state. During an initialization or power-up stage, which usually takes place when the supply voltage for the electronic system is switched on, the supply voltage rises from zero to an operational supply voltage. The operational supply voltage is often within a range associated with a source impedance or source current. During the process when the supply voltage rises from zero to an operational supply voltage, the supply voltage is less than a certain minimum voltage at which the electronic system is designed to properly function. Therefore it is often desirable to prevent any functioning of the electronic system when the supplied voltage is less than the minimum voltage. Generally, the electronic system should be in a reset mode when the supplied voltage is less than a threshold voltage, which is often the minimum voltage. When the electronic system is in the reset mode, components of the electronic system generally stay in their well-defined initial states, ready to properly function after the electronic system starts.
To ensure that an electronic system properly initializes, a voltage detection circuit is often used to generate an output signal to indicate whether the supply voltage has reached a threshold or minimum voltage level. The output signal of the voltage detection circuit is accordingly used to enable or disable the functioning of circuit components.
Often POR and UVLO (POR/UVLO) circuits are used as a voltage detection circuit. In application, a POR/UVLO circuit in an electronic system monitors power supply voltage. When the power supply voltage reaches a predetermined voltage level, which could be a minimum supply voltage or a first threshold voltage, the POR/UVLO circuit generates a POR signal. The POR signal is an indicator to other components of the electronic system that the electronic system has been turned on. In certain instances, the POR/UVLO circuit generates a power-on reset indication when the system power ramps up to the first threshold level that allows the electronic system to operate. In response to the power-on reset indication, other components of the electronic system perform various useful functions. For example, the system components can reset latches and perform start-up operations. When the power supply voltage drops under a second threshold voltage, which may be substantially equally to the first threshold voltage or may be different, the POR/UVLO circuit indicates to the electronic system by generating a UVLO signal. In response to the UVLO signal, the electronic system may shuts down some or all of its components in order to protect the system.
FIG. 1 illustrates an example of conventional system for power switching with POR/UVLO functions. The power switching system 100 includes, inter alia, a power supply 101 and a pulse width modulation (PWM) controller circuit 120. The power supply 101 includes an alternative current (AC) source 102, a rectifier 105, and a start up resistor 110. The PWM controller circuit 120 includes, inter alia, a PWM generator 122 and a POR/UVLO circuit 124. During operation, the power supply 101 supplies voltages to the PWM controller circuit 120, and the AC source 102 feeds an alternating current, which is rectified by the rectifier 105 and runs through the start up resistor 110. The PWM controller circuit 120 often uses the start up resistor 110 to start the PWM generator 122. The POR/UVLO circuit 124 provides indication signals to the PWM generator 122 to ensure that power switching system 100 is operating properly.
A POR/UVLO system is a useful application. However, conventional POR/UVLO systems, such as the conventional system illustrated on FIG. 1, generally consume a great amount of power due to high impedance. More specifically, the start up resistor 110 can be a source of significant energy inefficiency. This is because the voltage drop caused by the start up resistor 110, which is the difference between the output voltage 106 and the low voltage supply (VDD) 112, is large. As an example, the output voltage 106 is 370 volts DC, while the VDD 112 is only at 12 volts DC. Under light load or low load conditions, the power loss caused by the large voltage drop is great. To improve energy efficiency, a large start up resistor 110, whose resistance may be in order of mega ohms, is often used. However, the larger resistance not only improves energy efficiency, but also, as being a drawback, significantly lowers the source current, which can be as low as several tens of micro amps, being supplied to the PWM generator 122.
Hence it is highly desirable to improve techniques for power-on reset and under-voltage lockout schemes.